Implementation of HEVC intra 4×4 prediction on FPGA

Autor:	Djelouat Lamine, Sekkal Youcef, Skoudarli Abdellah
Rok vydání:	2015
Předmět:	Computer science business.industry Fpga chip computer.file_format Prediction algorithms Embedded system VHDL Bit Rate Reduction business Field-programmable gate array Encoder computer Computer hardware Coding (social sciences) computer.programming_language
Zdroj:	2015 Science and Information Conference (SAI).
DOI:	10.1109/sai.2015.7237291
Popis:	The last video coding standard HEVC (High Efficiency Video Coding) achieves 50% bit rate reduction relative to H.264 at the same visual quality. However, this new standard involves increased complexity compared to its predecessor. Intra prediction plays an important role in video encoders, especially in HEVC. The aim of this paper is to present hardware implementation of HEVC Intra 4×4 prediction algorithm on Xilinx Spartan-3E XC3S200 FPGA chip. The proposed architecture performed DC mode and angular modes for Intra 4×4 Prediction. Simulation results and synthesizing on Xilinx Spartan-3E FPGA of the HEVC intra 4×4 prediction algorithms demonstrate the accuracy and the efficiency of the proposed architecture.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::3c08cda8250014d351f422acb0d1e4aa https://doi.org/10.1109/sai.2015.7237291 Zobrazit plný text záznamu