A 4GHz 16nm SRAM Architecture with Low-Power Features for Heterogeneous Computing Platforms

Autor:	Andy Wangkun Chen, Mudit Bhargava, Tan Peixuan, Yulin Shi, Mark P. McCartney, Yew Keong Chong, Cagla Cakir, Sriram Thyagarajan
Rok vydání:	2019
Předmět:	Electric power system Random access memory business.industry Computer science Embedded system Dynamic demand Symmetric multiprocessor system Static random-access memory Architecture business Decoding methods Power (physics)
Zdroj:	VLSI Circuits
DOI:	10.23919/vlsic.2019.8778108
Popis:	We present a high-performance 6T SRAM architecture equipped with low-power features of late cancel, left-right enable, input-gating, and power-gating. Measurements show that these SRAMs can support CPUs running at 4GHz while offering dynamic power savings of 17% and 6% for the caches and the system respectively and up to 21X static power system savings for the low-power implementation.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::3b3edab1f64137c637378b62dc048f23 https://doi.org/10.23919/vlsic.2019.8778108 Zobrazit plný text záznamu