Table-Based Model of a Dual-Gate Transistor for Statistical Circuit Simulation
| Autor: | Dominik Kasprowicz |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
Amplifier
Transistor Semiconductor device modeling CPU time 02 engineering and technology Semiconductor device Ring oscillator Topology Computer Graphics and Computer-Aided Design 020202 computer hardware & architecture law.invention law Logic gate 0202 electrical engineering electronic engineering information engineering Electrical and Electronic Engineering Software Interpolation |
| Zdroj: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 38:1493-1500 |
| ISSN: | 1937-4151 0278-0070 |
| DOI: | 10.1109/tcad.2018.2852756 |
| Popis: | Table-based models of semiconductor devices are an attractive solution if a physics-based analytical model of the device cannot be found or has insufficient accuracy. Moreover, table-based models offer easy tradeoff between evaluation speed and accuracy. Traditionally, the biggest disadvantage of this class of model has been the inability to take device variability into account. This paper presents a table-based model that can handle process-induced variations of multiple device parameters. The impact of those variations on device operation is modeled analytically using special transformations of the current–voltage and charge–voltage characteristics of the nominal (i.e., variation-free) device. In contrast to multidimensional interpolation between the ${I}$ – ${V}$ and ${Q}$ – ${V}$ curves of “corner” devices, the proposed approach is much less costly in terms of CPU time, RAM use, and time dedicated to device characterization. The model has been successfully used in statistical simulations of an amplifier and ring oscillator built with VeSFETs—dual-gate junctionless transistors. |
| Databáze: | OpenAIRE |
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