Review on Process-Induced Strain Techniques for Advanced Logic Technologies

Autor:	Markus Lenski, Kai Frohberg, Maciej Wiatr, D. Greenlaw, Andreas Gehring, Andy Wei, Manfred Horstmann, Peter Javorka, Thorsten Kammler, Roman Boschke, Anthony Mowry, Thomas Feudel, Ralf Richter
Rok vydání:	2007
Předmět:	Materials science CMOS Annealing (metallurgy) Hardware_INTEGRATEDCIRCUITS Cmos logic circuits Silicon on insulator Hardware_PERFORMANCEANDRELIABILITY Performance improvement Engineering physics NMOS logic PMOS logic
Zdroj:	2007 15th International Conference on Advanced Thermal Processing of Semiconductors.
Popis:	We have extensively studied stress enhancing techniques to increase channel mobility starting at the 130 nm technology node and continued this towards the 45 nm node. Stressed overlayers and spacer materials, strained SOI substrates, embedded SiGe and SiC layers and their proximity effects, the impact of different silicides, stress memorization and compatibility with laser and flash anneals have been investigated. The integration of abovementioned techniques into a CMOS flow resulted in an outstanding pMOS and nMOS performance improvement, no reliability issues and no impact on short channel behavior.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::383f45398c573fc19f7c54ebdf92ebb8 https://doi.org/10.1109/rtp.2007.4383814 Zobrazit plný text záznamu