| Autor: |
Brian Samuel Beaman, Jean Audet |
| Rok vydání: |
2017 |
| Předmět: |
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| Zdroj: |
International Symposium on Microelectronics. 2017:000659-000662 |
| ISSN: |
2380-4505 |
| Popis: |
Land grid array (LGA) sockets are commonly used for industry standard and custom microprocessors to meet the increased performance challenges for a variety of server applications. Along with the need for increased high speed signaling capabilities comes the challenge to support lower voltages and higher currents. Typical testing that is conducted by the LGA socket suppliers does not provide an accurate assessment of the maximum current capabilities in a real product application due to the test card design and construction limitations. Typical test card designs use daisy chain connections to wire multiple LGA socket contacts in series. The daisy chain wiring in the test card adds to the resistive heating and results in an inaccurate maximum current rating. Also, the test cards typically do not have a cross section construction that is representative of a real product application with multiple ground planes that provide improved thermal dissipation of the heat generated by the LGA socket interface. Hardware testing was conducted to better understand the performance limitations for a new product application. The test card was designed to use multiple voltage and ground planes in the circuit card cross section to provide a low impedance path for current flow and a low voltage drop through the LGA socket interface. In addition to the test card construction, the test hardware included a special test module with a shorted chip to provide a more accurate power distribution path through the socket and processor package. The test variables included different plating metallurgy options for the LGA socket and the processor module along with different configurations for the voltage supply and ground return contacts. Electrical and thermal modeling techniques were used to simulate the test hardware configuration with good correlation between the hardware and modeling results. Based on the positive correlation results, additional modeling was conducted to simulate the worst case power mapping conditions for the processor chip along with a more accurate power distribution. The additional modeling results provided further insights into the maximum current capabilities for the LGA socket based on the temperature increase from the resistive heating in the socket contacts. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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