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Computer control may cause additional failure modes and effects that are new to analogue systems. False indication is one such failure mode that may bring unknown risks to a system. False indication refers to the problem when part of a system fails while other processes still work, and the failure is not revealed to operators. This paper presents a model-based simulation approach to systematically generate potential false indication and unintended consequences. Experiments showed that once a false indication occurs, it may have drastic effects on system safety. False indication can mislead the operator to perform adverse actions or no action. Therefore, we propose an assertion-based detection method to alleviate such failures. Our assertions contain process/device dependencies, timing relations and physical conservation rules. With these assertions, the operator may be alerted at run time. The proposed technique can reduce false indication problem. Moreover, it can also be used to assist the system design. |
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