A new structure for CMOS realization of MVL functions

Autor: A.K. Jain, R.J. Bolton, Mostafa Abd-El-Barr
Rok vydání: 1993
Předmět:
Zdroj: International Journal of Electronics. 74:251-263
ISSN: 1362-3060
0020-7217
DOI: 10.1080/00207219308925832
Popis: A new structure is proposed for the realization of multiple-valued logic (MVL) functions. Multiple-valued logic levels are represented in terms of current values, which represent the inputs and the outputs of the MVL circuits. Binary voltage signals are generated inside the structure by using a circuit element called threshold. Using these voltage signals and binary operators, such as AND, OR, XOR and inverter, binary voltage signals are obtained and used as control signals for generating the output current levels for the desired MVL function. The realizations of some example MVL circuits using the proposed structure are included along with HSPICE transient analysis simulation results to verify the functionality of the designed circuits.
Databáze: OpenAIRE