Multiple-input and -output OR/AND circuits for VLSI GaAs IC's
| Autor: | G.M. Lee, Tho T. Vu, Andrzej Peczalski, H.S. Somal, K.W. Lee, W.R. Betten |
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| Rok vydání: | 1987 |
| Předmět: |
Very-large-scale integration
Coupling Engineering business.industry Bipolar junction transistor Electrical engineering Integrated circuit Electronic Optical and Magnetic Materials Power (physics) law.invention law Logic gate Electronic engineering Field-effect transistor Electrical and Electronic Engineering business Hardware_LOGICDESIGN Electronic circuit |
| Zdroj: | IEEE Transactions on Electron Devices. 34:1630-1641 |
| ISSN: | 0018-9383 |
| DOI: | 10.1109/t-ed.1987.23131 |
| Popis: | OR/AND circuits with multiple input and output have been demonstrated experimentally for low-power 2K and 6K GaAs gate arrays with two levels of logic at approximately a 155-percent increase in speed and power product. The proposed multiple-logic levels process in parallel some complex logic functions with only one gate delay. Two proposed bootstrap techniques have shown an improvement of typically 12 percent in speed without an increase in power for low-power applications. In coupling these OR/AND circuits with the allowable buffered stage and the bootstrap enhancements, one can obtain good device performance over a spectrum of SSI to VLSI in the SDFL circuit family. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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