qcAffin : A Hardware Topology Aware Interrupt Affinitizing and Balancing Scheme for Multi-Core and Multi-Queue Packet Processing Systems
| Autor: | Nen-Fu Huang, Wen-Yen Tsai |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
020203 distributed computing
Multi-core processor Interrupt latency Computer science Network packet business.industry Interrupt handler Packet processing Deep packet inspection 02 engineering and technology Network interface Advanced Programmable Interrupt Controller Topology Programmable Interrupt Controller Instruction set Computational Theory and Mathematics Hardware and Architecture 020204 information systems Signal Processing 0202 electrical engineering electronic engineering information engineering Interrupt priority level Interrupt business Computer hardware Computer network |
| Zdroj: | IEEE Transactions on Parallel and Distributed Systems. 27:1783-1795 |
| ISSN: | 1045-9219 |
| DOI: | 10.1109/tpds.2015.2453960 |
| Popis: | Interrupt affinitization of multi-queue network interface cards is a fundamental composition that defines how packets from individual queue are processed by which CPU-cores on multi-core platforms. In this paper, we propose qcAffin to attain an optimal queue-to-core affinitization for packet processing systems based on a numerical cost model derived from hardware topology and runtime system workloads. Static architectural characteristics comprising the memory hierarchy and topology of hardware components are first analyzed to calculate static interrupt affinitization costs. Then we attempt dynamic interrupt affinitization to balance workloads on CPU-cores and improve overall performance. Classical networking applications ranging from bridging, routing, access control list (ACL) matching to deep packet inspection (DPI) with different frame sizes are extensively experimented to compare the performance of the proposed scheme and other existing approaches. As demonstrated in the comparison result, qcAffin achieves the similar performance of the best affinitization approach and outperforms the Linux default affinitizer by averages of 102, 278, 248 and 131 percent on 1G NICs for the four applications. On 10G NICs, dramatic boosts of 1,424 and 1,343 percent are measured for the bridging and routing applications, respectively. Moreover, the effectiveness of dynamic interrupt balancing is justified by a maximum of 150 percent higher system utilization and 1.2 Mpps more throughput compared to the fixed affinitization approach in a simulated setup of unbalanced traffic load. |
| Databáze: | OpenAIRE |
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