A Multi-chip SiP Package Design Scheme
| Autor: | Suo Siliang, Jian Ganyang, Cai Tiantian, Hao Yao, Zhengqiang Yu, Wei Xi |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
Interconnection
Hardware_MEMORYSTRUCTURES business.industry Computer science Hardware_PERFORMANCEANDRELIABILITY Substrate (printing) Chip Signal Power (physics) Stack (abstract data type) visual_art Electronic component Hardware_INTEGRATEDCIRCUITS visual_art.visual_art_medium business Engineering design process Computer hardware |
| Zdroj: | 2019 IEEE 8th Joint International Information Technology and Artificial Intelligence Conference (ITAIC). |
| DOI: | 10.1109/itaic.2019.8785749 |
| Popis: | The structure design scheme of two-chip stack, chip and device is adopted in this design, and the main control chip, the safety chip and several kinds of passive components are designed and assembled on the multi-layer substrate by using the SiP package. When the PAD to PAD bonding mode is not suitable, the corresponding PAD of the two chips can be led out to the different fingers of the substrate, and then the method of interconnection of the different finger on the substrate is performed. The design process of SiP package substrate and the items needing attention are described. The rationality of this design is proved by the simulation results of power supply, signal and heat dissipation performance. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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