Synthesis of a microelectronic structure of a specialized processor for sorting an array of binary numbers

Autor:	Yaroslav Nykolaichuk, Boris Krulikovskyi, Volodymyr Gryga, Nataliia Vozna
Rok vydání:	2017
Předmět:	Structure (mathematical logic) Computer Science::Hardware Architecture Computer science business.industry Sorting Microelectronics Schematic Binary number Parallel computing business Field-programmable gate array Representation (mathematics) Time complexity
Zdroj:	2017 XIIIth International Conference on Perspective Technologies and Methods in MEMS Design (MEMSTECH).
DOI:	10.1109/memstech.2017.7937560
Popis:	Methods for graphical representation of algorithms of sorting arrays of binary numbers were analyzed. Improved schematic solution for structure development and components of specialized processor for sorting an array of binary numbers by “bubbles” method was represented. As a result, high-performance structures of specialized processors for sorting an array of binary numbers on FPGA were synthesized. System characteristics of hardware and time complexity of this class of processors targeted at microelectronic implementation in structure of embedded systems were calculated.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::32e21193fa4f6eb4a974553ac3ce9997 https://doi.org/10.1109/memstech.2017.7937560 Zobrazit plný text záznamu