Fully-compensated emitter-coupled logic: Eliminating the drawbacks of conventional ECL

Autor:	P. W. J. Verhofstadt, H. H. Muller, W. K. Owens
Rok vydání:	1973
Předmět:	Engineering Pass transistor logic business.industry Logic gate Logic family Electronic engineering Logic level High Threshold Logic Electrical and Electronic Engineering Emitter-coupled logic business NMOS logic Resistor–transistor logic
Zdroj:	IEEE Journal of Solid-State Circuits. 8:362-367
ISSN:	0018-9200
DOI:	10.1109/jssc.1973.1050418
Popis:	New approaches to high-speed emitter-coupled logic circuitry, overcoming system drawbacks by eliminating sensitivity to environmental changes, are discussed. A comparison is made with uncompensated conventional ECL. Circuits displaying threshold and level invariance over wide ranges of ambient temperature, typically greater than 0/spl deg/-75/spl deg/C, and supply voltage, -4.7 to -6.2 V, are described. Suggestions are made as to how these features can lead to higher performance, and at the same time, lower cost systems.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::329e04b678162a3dec01a4e22174c1d1 https://doi.org/10.1109/jssc.1973.1050418 Zobrazit plný text záznamu