An asymmetric memory cell using a C-TFT for single-bit-line SRAM's
| Autor: | H. Miyoshi, M. Ashida, S. Maegawa, Hirotada Kuriyama, S. Maeda, Kazuhito Tsutsumi, T. Nishimura, K. Anami, Y. Kohno |
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| Rok vydání: | 1999 |
| Předmět: |
Engineering
business.industry Sense amplifier Transistor Electrical engineering Hardware_PERFORMANCEANDRELIABILITY Electronic Optical and Magnetic Materials law.invention law Memory cell Thin-film transistor Low-power electronics Bit line Static random-access memory Electrical and Electronic Engineering Line (text file) business |
| Zdroj: | IEEE Transactions on Electron Devices. 46:927-932 |
| ISSN: | 0018-9383 |
| DOI: | 10.1109/16.760399 |
| Popis: | This paper proposes a compact single-bit line SRAM memory cell, which we call an asymmetric memory cell (AMC), using a complementary thin-film transistor (C-TFT). A C-TFT is composed of a top-gate n-channel TFT and a bottom-gate p-channel TFT. The proposed cell size can be reduced to 88% as compared with the conventional one using 0.4-/spl mu/m design rules. Stable read and write operations under low-voltage can be realized by using a C-TFT. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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