New method for the quantitative evaluation of wafer pattern shape based on CAD data

Autor:	Masanori Takahashi, Atsushi Uemoto, Ryoichi Matsuoka
Rok vydání:	2003
Předmět:	Engineering business.industry CAD Semiconductor device Application-specific integrated circuit Hardware_INTEGRATEDCIRCUITS Feature (machine learning) Electronic engineering Design process Upstream (networking) Wafer business Process engineering Technology CAD
Zdroj:	SPIE Proceedings.
ISSN:	0277-786X
DOI:	10.1117/12.483688
Popis:	Semiconductor device manufacturing demands rapid ramp of yield together with feature size reduction, especially for logic and ASIC because of their short-lives and small volume production characteristics. As a technological breakthrough for rapid yield ramp of such devices, we have endeavored to integrate CAD technology with SEM for printed pattern observation, and have developed Grade Scope, an evaluation technology, by combining the wafer proces and upstream design process.
Databáze:	OpenAIRE
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