Effects of TSVs (through-silicon vias) on thermal performances of 3D IC integration system-in-package (SiP)
| Autor: | John H. Lau, Tang Gong Yue |
|---|---|
| Rok vydání: | 2012 |
| Předmět: |
Materials science
Through-silicon via business.industry Thermal resistance Three-dimensional integrated circuit Condensed Matter Physics Chip Atomic and Molecular Physics and Optics Surfaces Coatings and Films Electronic Optical and Magnetic Materials System in package Thermal conductivity Interposer Electronic engineering Optoelectronics Junction temperature Electrical and Electronic Engineering Safety Risk Reliability and Quality business |
| Zdroj: | Microelectronics Reliability. 52:2660-2669 |
| ISSN: | 0026-2714 |
| DOI: | 10.1016/j.microrel.2012.04.002 |
| Popis: | Thermal performances of 3D IC integration system-in-package (SiP) with TSV (through silicon via) interposer/chip are investigated based on heat-transfer and CFD (computational fluid dynamic) analyses. Emphases are placed on the determination of (1) the equivalent thermal conductivity of interposers/chips with various copper-filled, aluminum-filled, and polymer w/o filler filled TSV diameters, pitches, and aspect ratios, (2) the junction temperature and thermal resistance of 3D IC SiP with various TSV interposers, (3) the junction temperature and thermal resistance of 3D stacking of up to 8 TSV memory chips, and (4) the effect of thickness of the TSV chip on its hot spot temperature. Useful design charts and guidelines are provided for engineering practice convenient. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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