| Autor: |
Leitner Lawrence, S. M. German, Jackson Jonathan, Fady Copty, Richard D. Peterson, Schumann John A, Randall R. Pratt, Michal Rimon, Johannes Koesters, Amir Nahir, Klaus-Dieter Schubert, Holger Horbach, Bishop Brock, Oz Hershkovitz, Jörg Behrend, John M. Ludden, G. B. Meil, Charles Meissner, S. Ayub, Ronny Morad, Klaus Keuerleber, Viresh Paruthi |
| Rok vydání: |
2015 |
| Předmět: |
|
| Zdroj: |
IBM Journal of Research and Development. 59:11:1-11:17 |
| ISSN: |
0018-8646 |
| Popis: |
This paper describes methods and techniques used to verify the POWER8™ microprocessor. The base concepts for the functional verification are those that have been already used in POWER7® processor verification. However, the POWER8 design point provided multiple new challenges that required innovative solutions. With approximately three times the number of transistors available, compared to the POWER7 processor chip, functionality was added by putting additional enhanced cores on-chip and by developing new features that intrinsically require more software interaction. The examples given in this paper demonstrate how new tools and the continuous improvement of existing methods addressed these verification challenges. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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