Autor: |
J.L. Aucouturier, J.P. Dom, Ph. Roux, M. Depey |
Rok vydání: |
1976 |
Předmět: |
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Zdroj: |
ESSCIRC 76: 2nd European Solid State Circuits Conference. |
DOI: |
10.1109/esscirc.1976.5469100 |
Popis: |
This paper presents a project on an electrically reprogrammable memory system in which the control of the avalanche degradation of the H FE of bipolar tetrode transistor is executed by the gate voltage. The design of a type REPROM with 1024 bits capacity having an access time better than 100 ns for a total power of 500 mW is attempted. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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