On-Chip ESD detection circuit for system-level ESD protection design
| Autor: | Che-Ming Yang, Wan-Yen Lin, Ming-Dou Ker, Tung-Yang Chen, Shih-Fan Chen, Cheng-Cheng Yen |
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| Rok vydání: | 2010 |
| Předmět: |
Engineering
Electrostatic discharge business.industry Circuit performance Firmware Circuit design Electrical engineering Hardware_PERFORMANCEANDRELIABILITY Integrated circuit design computer.software_genre CMOS Hardware_INTEGRATEDCIRCUITS Electronic engineering System level Transient (oscillation) business computer Hardware_LOGICDESIGN |
| Zdroj: | 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology. |
| DOI: | 10.1109/icsict.2010.5667447 |
| Popis: | A new on-chip CR-based electrostatic discharge (ESD) detection circuit for system-level ESD protection design is proposed in this work. The circuit performance to detect positive or negative electrical transients generated by system-level ESD tests has been analyzed in HSPICE simulation and verified in silicon chip. The experimental results in a 0.13-µm CMOS process have confirmed that the proposed detection circuit can detect ESD-induced transient disturbance during system-level ESD zapping. The detection results can be used as system recovery firmware index to improve the immunity of CMOS IC products against system-level ESD stress. |
| Databáze: | OpenAIRE |
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