Reutilization of Trace Buffers for Performance Enhancement of NoC based MPSoCs
| Autor: | Sidhartha Sankar Rout, Sujay Deb, Badri M |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
010302 applied physics
Router Profiling (computer programming) business.industry Computer science media_common.quotation_subject Process (computing) 02 engineering and technology Reuse 01 natural sciences 020202 computer hardware & architecture Idle Debugging Embedded system 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Overhead (computing) business media_common TRACE (psycholinguistics) |
| Zdroj: | ASP-DAC |
| Popis: | The contemporary network-on-chips (NoCs) are so complex that capturing all network functional faults at presilicon verification stage is nearly impossible. So, on-chip design-for-debug (DfD) structures such as trace buffers are provided to assist capturing escaped faults during post-silicon debug. Most of the DfD modules are left idle after the debug process. Reuse of such structures can compensate for the area overhead introduced by them. In this work, the trace buffers are reutilized as extended virtual channels for the router nodes of an NoC during in-field execution. Optimal distribution of trace buffers among the routers is performed based upon their load profiling. Experiments with several benchmarks on the proposed architecture show an average of 11.36% increase in network throughput and 13.97% decrease in average delay. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|