Cache-Aware Dynamic Skewed Tree for Fast Memory Authentication
| Autor: | Saru Vig, Siew-Kei Lam, Rohan Juneja |
|---|---|
| Rok vydání: | 2021 |
| Předmět: |
010302 applied physics
Authentication Hardware_MEMORYSTRUCTURES Computer science business.industry Skew 02 engineering and technology 01 natural sciences 020202 computer hardware & architecture Parsec Tree (data structure) Overhead (business) 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Locality of reference System on a chip Cache business Computer network |
| Zdroj: | ASP-DAC |
| DOI: | 10.1145/3394885.3431593 |
| Popis: | Memory integrity trees are widely-used to protect external memories in embedded systems against bus attacks. However, existing methods often result in high performance overheads incurred during memory authentication. To reduce memory accesses during authentication, the tree nodes are cached on-chip. In this paper, we propose a cache-aware technique to dynamically skew the integrity tree based on the application workloads in order to reduce the performance overhead. The tree is initialized using Van-Emde Boas (vEB) organization to take advantage of locality of reference. At run time, the nodes of the integrity tree are dynamically positioned based on their memory access patterns. In particular, frequently accessed nodes are placed closer to the root to reduce the memory access overheads. The pro-posed technique is compared with existing methods on Multi2Sim using benchmarks from SPEC-CPU2006, SPLASH-2 and PARSEC to demonstrate its performance benefits. |
| Databáze: | OpenAIRE |
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