A Fully Integrated FVF LDO With Enhanced Full-Spectrum Power Supply Rejection

Autor: Yan Lu, Rui P. Martins, Chenchang Zhan, Guigang Cai
Rok vydání: 2021
Předmět:
Zdroj: IEEE Transactions on Power Electronics. 36:4326-4337
ISSN: 1941-0107
0885-8993
DOI: 10.1109/tpel.2020.3024595
Popis: This article presents a fully integrated flipped voltage follower (FVF) based low-dropout (LDO) regulator with enhanced full-spectrum power supply rejection (PSR) and unity-gain bandwidth over 400MHz for noise-sensitive circuits. Following the study of three types of FVF LDO's PSR performances, we propose a novel FVF LDO with a low-gain fast loop-1 and a high-gain slow loop-2. In prior FVF LDOs, their PSRs are either full-spectrum, or not, but with low PSR at low frequency. In this article, we fully utilize both dc gains of loop-1 and loop-2 for the low-frequency PSR, while the high-frequency PSR remains unchanged. In addition, we use dynamic compensation to push the loop-2's UGB to higher frequency for a better PSR bandwidth. This work, fabricated in 65 nm complementary metal oxide semiconductor (CMOS), with 1.2-V input and 1-V output, exhibits a measured quiescent current ( IQ ) varying from 27 to 82 μ A for a load current I LOAD between 5 μ A and 20 mA. The circuit achieves a low frequency PSR of –58 dB with the worst full-spectrum PSR of –9 dB in 20 mA I LOAD with a 300 pF on-chip output capacitor. Further, with an UGB over 400 MHz, the proposed FVF LDO reaches 0.9 ns response time when ILOAD changes between 100 μ A and 20 mA with edge times less than 0.8 ns.
Databáze: OpenAIRE