Soft-Error-Resilient FPGAs Using Built-In 2-D Hamming Product Code
| Autor: | Kaushik Roy, Sang Phill Park, Dongsoo Lee |
|---|---|
| Rok vydání: | 2012 |
| Předmět: |
business.industry
Computer science Reliability (computer networking) Soft error Hardware and Architecture Static random-access memory Electrical and Electronic Engineering Universal Product Code Error detection and correction Field-programmable gate array business Hamming code Software Auxiliary memory Computer hardware |
| Zdroj: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 20:248-256 |
| ISSN: | 1557-9999 1063-8210 |
| DOI: | 10.1109/tvlsi.2010.2095435 |
| Popis: | Radiation-induced soft error rate (SER) degrades the reliability of static random access memory (SRAM)-based field programmable gate arrays (FPGAs). This paper presents a new built-in 2-D Hamming product code (2-D HPC) scheme to provide reliable operation of SRAM-based FPGAs in hostile operating environments such as space. Multibit error correction capability of our built-in 2-D HPC can improve the reliability, and hence, system availability, by orders of magnitude. Simulation results show that the large number of error correction capability of 2-D HPC can recover configuration bits without depending on an external memory preserving a golden copy of the configuration bits. To provide efficient 2-D HPC in a built-in logic, we also propose a new 2-D SRAM buffer. Using the proposed multibit error correction scheme, system availability of an SRAM-based FPGA can be more than 99.9999999% with SRAM cell failures in 1 billion h of operation of 7. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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