| Autor: |
Tadahiro Kuroda, Tsutomu Takeya, Noriyuki Miura, Kazutaka Kasuga, Mitsuko Saito |
| Rok vydání: |
2009 |
| Předmět: |
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| Zdroj: |
2009 IEEE Asian Solid-State Circuits Conference. |
| Popis: |
Inductive-coupling link between stacked chips in a package communicates by using coils made by on-chip interconnections. An XY-coil layout style allows logic interconnections to go through the coil, which significantly saves interconnection resources consumed by the coil. However, the logic interconnections generate capacitive-coupling noise on the coil and degrade signal in the inductive-coupling link. In this paper, an extended XY coil with ground shields is presented for noise reduction. Simulation study shows that the noise voltage is reduced to 1/5 of the conventional XY coil. This noise reduction enables to reduce transmit power required for the same BER. Test-chip measurement in 0.18μm CMOS demonstrates that the transmit power at lGb/s with BER |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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