A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing

Autor: Sadahiko Miura, Tetsuo Endoh, Keizo Kinoshita, Takahiro Hanyu, Tadahiko Sugibayashi, Naoki Kasai, Noboru Sakimura, Ayuka Morioka, Hideo Ohno, Shunsuke Fukami, Kunihiko Ishihara, Ryusuke Nebashi, K. Tokutome, Yukihide Tsuji, Hiroaki Honjo
Rok vydání: 2014
Předmět:
Zdroj: ISCAS
Popis: A delay circuit using four-terminal magnetic-random-access-memory (MRAM) devices was designed for power-efficient time-domain signal processing. A cell area of 6.4 μm 2 was obtained using 90-nm CMOS/MRAM technologies. The basic operations to both store the data and control the delay time were confirmed on the fabricated test chips. In addition, we proposed a power-efficient neuromorphic core using the delay circuit.
Databáze: OpenAIRE