Design of the IBM z14 microprocessor
| Autor: | Bronson Tim, Adam B. Collura, Vesselina K. Papazova, Michael A. Blake, Ulrich Mayer, Pak-Kin Mak, Christian Jacobi, Martin Recktenwald, Robert J. Sonnelitter, Anthony Saporito, Markus Helms, Aaron Tsai, Arthur J. O'Neill |
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| Rok vydání: | 2018 |
| Předmět: |
010302 applied physics
Hardware_MEMORYSTRUCTURES General Computer Science Computer science Pipeline (computing) 020208 electrical & electronic engineering Translation lookaside buffer 02 engineering and technology Chip Branch predictor computer.software_genre 01 natural sciences law.invention Microprocessor law 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Operating system Central processing unit Cache IBM computer |
| Zdroj: | IBM Journal of Research and Development. 62:8:1-8:11 |
| ISSN: | 0018-8646 |
| DOI: | 10.1147/jrd.2018.2798718 |
| Popis: | The latest-generation IBM Z processor provides enhanced performance and compute capacity compared to its IBM z13 predecessor. This paper describes some of the major improvements that include an additional perceptron branch predictor, a completely redesigned translation engine that is tightly integrated into the core pipeline, and an integrated level-1 cache directory and translation lookaside buffer design. Outside of the central processing unit (CPU), the cache sizes have increased on each cache level, and each processor chip now contains 10 CPUs. The system topology has been optimized to improve cache transfer latencies for workloads spanning multiple processor chips. The bus interfaces between the chips have been redesigned to improve peak bus traffic handling. In combination, these enhancements provide significant performance improvements in traditional data-serving workloads, as well as in virtualized Linux environments running database, analytic, and cognitive workloads. |
| Databáze: | OpenAIRE |
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