Optimal Unate Decomposition Method for Synthesis of Mixed CMOS VLSI Circuits
| Autor: | Sai Praveen Kadiyala, Debasis Samanta |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
020208 electrical & electronic engineering
Logic family Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Dissipation Domino 020202 computer hardware & architecture Integrated injection logic CMOS Transistor count Domino logic Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering Hardware_LOGICDESIGN Mathematics Electronic circuit |
| Zdroj: | International Journal of VLSI Design & Communication Systems. 7:01-19 |
| ISSN: | 0976-1357 0976-1527 |
| Popis: | Static CMOS logic style is often the choice of designers for synthesizing low power circuits. This style is robust in terms of noise integrity however, it offers less speed. Domino logic style, as an alternative is often found in critical paths of various large scale high performance circuits. Yet, due to high switching activity they are not suitable for synthesis of low power circuits. To achieve both power and speed benefits, we propose a method of designing circuit using mixed CMOS logic style, taking advantages of both static and Domino logic styles. For a given circuit, we extract the unate and binate components using a unate decomposition algorithm. These are optimized such that the resulting circuit is optimum in terms of power, area and delay. To do this, a multi-objective genetic algorithm is employed. The optimized unate and binate blocks are mapped using Domino and static cell libraries, respectively. Testing the efficacy of our approach with ISCAS85 and MCNC89 benchmark circuits showed an improvement of 25% in delay and 22% in transistor count with 12% more power dissipation compared to circuits with only static CMOS logic. Thus, mixed CMOS circuits are promising in high speed and area constraint applications. |
| Databáze: | OpenAIRE |
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