Popis: |
Device scaling has enabled continuous performance increase of integrated circuits. However, severe reliability and yield concerns are arising against the background of nanotechnology. Tradition-ally, most causes and countermeasures were solely considered manufacturing issues, but lately, we have seen a shift towards op-erational reliability issues. Though, besides intense research on soft-errors and system-level approaches very little effort is put into low-level design solutions in order to enhance lifetime reliability. Hence, we demonstrate that redundant transistor insertion does im-prove system reliability significantly as regards Time-Dependent Dielectric Breakdown (TDDB). Furthermore, we introduce an al-gorithm which identifies the transistors being most vulnerable to TDDB. Subsequently, redundant transistors (called shadow transis-tors) are inserted at the previously identified instances. Lastly, we argue for applying high threshold voltage devices for the redundant transistors. Finally, we present results for a set of benchmark cir-cuits and prove the combined approach successful. The enhanced designs were on average 41.8% more reliable compared to the ini-tial designs in respect of TDDB at the price of moderately in-creased power consumption and delay. |