| Popis: |
Aiming at the speed and accuracy bottleneck of FFT processor in harmonic analyzer, proposed a method of using parallel processing, pipelinine structure floating-point operation, and an improved butterfly unit based on FPGA to design the processor. Used bottom-up method and VHDL language to program function modules, futher used the tool of quartus II to simulate the 1024 complex points. The results show that the processor improves the speed based on the high accuracy, could meet the real-time requirement of harmonic analyzer. |
