A 30 ns 16 Mb 2 b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive Application
| Autor: | Helmut Graeb, Bernhard Wicht, Thomas Kern, Sebastian Kiesel |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
Hardware_MEMORYSTRUCTURES
business.industry Computer science 020208 electrical & electronic engineering Electrical engineering Fault tolerance Biasing 02 engineering and technology Flash memory Microcontroller Robustness (computer science) 0202 electrical engineering electronic engineering information engineering Time domain business Random access Voltage |
| Zdroj: | VLSI-DAT |
| DOI: | 10.1109/vlsi-dat.2019.8741536 |
| Popis: | The growing application scope of non-volatile memory based microcontrollers leads to increased memory capacity requirements. Scaling issues of established flash technologies impede further increase of memory density. Emerging technologies still suffer from a lack of robustness for automotive application. This paper presents the first embedded multi-level cell flash memory macro for automotive application manufactured in 28 nm technology. It employs a robust time-domain voltage sensing scheme with ramped gate cell biasing to achieve low latency combined with increased fault tolerance. Measurement results show widened time-domain read windows when applying dynamic voltage ramps to the word lines. The 16 Mb memory features 30 ns random access time at temperatures up to 175 °C with 2b/cell operation. Retention bit error rates below 80 ppm are achieved after 1 k programming and erasing cycles. |
| Databáze: | OpenAIRE |
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