A Method for Creating Ladder Diagrams from Timing Diagrams as Sequential Circuits
Autor: | Iko Miyazawa |
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Rok vydání: | 2020 |
Předmět: |
Timing diagram
0209 industrial biotechnology Sequential logic Computer science 020208 electrical & electronic engineering Programmable logic controller Ladder logic 02 engineering and technology 020901 industrial engineering & automation Discrete time and continuous time 0202 electrical engineering electronic engineering information engineering Interval (graph theory) Timer Algorithm Block (data storage) |
Zdroj: | SICE |
DOI: | 10.23919/sice48898.2020.9240400 |
Popis: | In this paper, I focus on the scan processing method called cyclic scan as the execution method of PLC (Programmable Logic Controller) and introduce the discrete time based on such execution method. I propose a method that divides the time axis of a TD (Timing Diagram) using the discrete time and configures the behavior of the TD in the divided time interval such as a sequential circuit. I show that if a sequential circuit is obtained, the TD can be directly converted into LD (Ladder Diagram) which is a programming language of PLC. I also discuss the effect when a function block of timer has been used in PLC. |
Databáze: | OpenAIRE |
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