Multi-Ported Register File for Reducing the Impact of PVT Variation
| Autor: | Masaya Sumita, Yuuichirou Ikeda, Makoto Nagata |
|---|---|
| Rok vydání: | 2006 |
| Předmět: |
Computer science
business.industry Process (computing) Register file Hardware_PERFORMANCEANDRELIABILITY 32-bit Chip Porting Electronic Optical and Magnetic Materials Process variation Variation (linguistics) Hardware_INTEGRATEDCIRCUITS Electrical and Electronic Engineering business Computer hardware Electronic circuit |
| Zdroj: | IEICE Transactions on Electronics. :356-363 |
| ISSN: | 1745-1353 0916-8524 |
| Popis: | We have developed a 32-bit, 32-word, and 9-read, 7-write ported register file. This register file has several circuits and techniques for reducing the impact of process variation that is marked in recent process technologies, voltage variation, and temperature variation, so called PVT variation. We describe these circuits and techniques in detail, and confirm their effects by simulation and measurement of the test chip. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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