| Autor: |
Jietao Diao, Changlin Chen, Changhang Luo |
| Rok vydání: |
2020 |
| Předmět: |
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| Zdroj: |
2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM). |
| DOI: |
10.1109/icicm50929.2020.9292144 |
| Popis: |
The processing of Convolutional Neural Network (CNN) involves a large amount of data movements and thus usually causes significant latency and energy consumption. Resistive Random Access Memory (ReRAM) based CNN accelerators with Processing-In-Memory (PIM) architecture are deemed as a promising solution to improve the energy efficiency. However, the weight mapping methods and the corresponding dataflow in state of the art accelerators are not yet well designed to fully explore the possible data reuse in the CNN inference. In this paper, we propose a new ReRAM based PIM architecture named FullReuse in which all types of data reuse are realized with novel simple hardware circuit. The latency and energy consumption in the buffer and interconnect for data movements are minimized. Experiments with the VGG-network on the NeuroSim platform shows that the FullReuse can achieve up to 1.6 times improvement in the processing speed when compare with state of the art accelerators with comparable power efficiency and 14% area overhead. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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