A Unified Buffering Management with Set Divisible Cache for PCM Main Memory
| Autor: | Sang-Jae Nam, Jeong-Geun Kim, Su-Kyung Yoon, Shin-Dug Kim, Mei Ying Bian |
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| Rok vydání: | 2016 |
| Předmět: |
010302 applied physics
Hardware_MEMORYSTRUCTURES Memory hierarchy Computer science Cache coloring CPU cache Registered memory 02 engineering and technology Parallel computing Write buffer 01 natural sciences 020202 computer hardware & architecture Computer Science Applications Theoretical Computer Science Computational Theory and Mathematics Hardware and Architecture 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Interleaved memory Cache Software Dram |
| Zdroj: | Journal of Computer Science and Technology. 31:137-146 |
| ISSN: | 1860-4749 1000-9000 |
| DOI: | 10.1007/s11390-016-1617-7 |
| Popis: | This research proposes a phase-change memory (PCM) based main memory system with an effective combination of a superblock-based adaptive buffering structure and its associated set divisible last-level cache (LLC). To achieve high performance similar to that of dynamic random-access memory (DRAM) based main memory, the superblock-based adaptive buffer (SABU) is comprised of dual DRAM buffers, i.e., an aggressive superblock-based pre-fetching buffer (SBPB) and an adaptive sub-block reusing buffer (SBRB), and a set divisible LLC based on a cache space optimization scheme. According to our experiment, the longer PCM access latency can typically be hidden using our proposed SABU, which can significantly reduce the number of writes over the PCM main memory by 26.44%. The SABU approach can reduce PCM access latency up to 0.43 times, compared with conventional DRAM main memory. Meanwhile, the average memory energy consumption can be reduced by 19.7%. |
| Databáze: | OpenAIRE |
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