Heterogeneous Multiprocessor on a Chip Which Enables 54x AAC-LC Stereo Encoding

Autor:	Keiji Kimura, Yasutaka Wada, Masafumi Onouchi, Hiroaki Shikano, Tatsuya Kamei, Yusuke Nitta, Tomoyuki Kodama, Kunio Uchiyama, Manabu Kusaoke, Hironori Kasahara, Toshihiko Odaka, Masaki Ito, T. Todaka, H. Tanaka, T. Tsunoda, E. Nagahama
Rok vydání:	2007
Předmět:	business.industry Computer science Multiprocessing computer.file_format Chip Logic synthesis Computer architecture Advanced Audio Coding Embedded system Encoding (memory) Memory architecture System on a chip Hardware_ARITHMETICANDLOGICSTRUCTURES business computer
Zdroj:	2007 IEEE Symposium on VLSI Circuits.
Popis:	A heterogeneous multiprocessor on a chip has been designed and implemented. It consists of 2 CPUs and 2 DRPs (Dynamic Reconfigurable Processors). The design of DRP was intended to achieve high-performance in a small area to be integrated on a SoC for embedded systems. Memory architecture of CPUs and DRPs were unified to improve programming and compiling efficiency. 54times AAC-LC stereo encoding has been enabled with 2 DRPs at 300 MHz and 2 CPUs at 600 MHz.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::23a3c67b353f6880980af7266ad344ba https://doi.org/10.1109/vlsic.2007.4342719 Zobrazit plný text záznamu