Design of Carry Select Adder for FIR Filter

Autor:	Ashwini Lokhande, V. G. Raut
Rok vydání:	2015
Předmět:	Adder Vlsi system design Finite impulse response Filter (video) Computer science Carry-select adder Carry-save adder Hardware_ARITHMETICANDLOGICSTRUCTURES Arithmetic Electronic industry Hardware_LOGICDESIGN Power (physics)
Zdroj:	International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering. :1348-1351
ISSN:	2278-8875 2320-3765
DOI:	10.15662/ijareeie.2015.0403026
Popis:	A fast and power efficient adder is always needed in electronic industry and is one of the vast area of research in VLSI system design. In this paper, design of two different Carry Select Adder (CSLA) are presented, one by using multiple pairs of RCA and another by using D-latch logic. Designing Carry Select Adder with RCA slightly increases the delay. To overcome this problem, CSLA is improved by replacing one of the RCA by D-latch. The performance of this CSLA is evaluated by implementing an FIR Filter by using CSLA in the adder part of filter. This work focuses on the performance of CSLA in terms of delay and power.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::22ed18d5b8fb2ed955fb968f2832edfb https://doi.org/10.15662/ijareeie.2015.0403026 Zobrazit plný text záznamu