Globally-asynchronous locally-synchronous architectures to simplify the design of on-chip systems
Autor: | Hubert Kaeslin, T. Villiger, Norbert Felber, J. Muttersbach, Wolfgang Fichtner |
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Rok vydání: | 2003 |
Předmět: | |
Zdroj: | Twelfth Annual IEEE International ASIC/SOC Conference (Cat. No.99TH8454). |
DOI: | 10.1109/asic.1999.806526 |
Popis: | A novel methodology for realizing Globally-Asynchronous Locally-Synchronous (GALS) architectures is reported. We developed a library of predesigned modules that facilitate the assembly of independently clocked modules to on-chip systems. The components of this library establish high-performance data exchange channels which are instrumental in constructing flexible architectures. The validity of our concept is proven by applying it to an ASIC design with real-world complexity. |
Databáze: | OpenAIRE |
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