Autor:	R. H. Krambeck, Philip W. Diodato, A. K. Goksel, W.W. Troutman, M. S. Tsay
Rok vydání:	1985
Předmět:	Very-large-scale integration Hardware_MEMORYSTRUCTURES Floating point business.industry Transistor Electrical engineering Chip law.invention Microprocessor CMOS law Chip-scale package Logic gate Hardware_INTEGRATEDCIRCUITS business Mathematics
Zdroj:	ESSCIRC '85: 11th European Solid-State Circuits Conference.
DOI:	10.1109/esscirc.1985.5467761
Popis:	Some aspects of design of a VLSI floating-point chip, which provides the WE/spl registered/32100 microprocessor with math acceleration capabilities, are described. The chip is implemented in 1.75-/spl mu/m twin-tub CMOS II technology [2] and contains 140 000 transistors.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::21e0579284678ab8d756ec2cd2328399 https://doi.org/10.1109/esscirc.1985.5467761 Zobrazit plný text záznamu