Empirical Bounds of Multicore Cache Interference for Real-Time Schedulability Analysis
| Autor: | Russell Kegley, Jonathan Preston, Alan Charsagua, Matthew Anderson, Srini Srinivasan, Steve Drager, Nithya Srinivasan, Mark Gerhardt, Rin Ha, Richard Rosa, Rich Hilliard, Clifford Granger |
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| Rok vydání: | 2019 |
| Předmět: |
010302 applied physics
020203 distributed computing Multi-core processor Computer science Distributed computing Context (language use) 02 engineering and technology Certification Space (commercial competition) 01 natural sciences Upper and lower bounds Economies of scale 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Predictability Cache interference |
| Zdroj: | 2019 IEEE/AIAA 38th Digital Avionics Systems Conference (DASC). |
| Popis: | Multicore processors offer significant advantages of weight, power, and space to embedded real-time developers, making their adoption almost inevitable. Also, system sustainability and economies of scale will increasingly make multicore devices indispensable. However, predictability of performance, specifically, establishing realistic upper bounds on execution time for schedulability analysis is a significant challenge to certification. This paper describes a methodology for empirically establishing a reasonable, high-confidence upper bound for cache interference effects in the context of engineering practices commonly used in certifiable real-time systems. |
| Databáze: | OpenAIRE |
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