A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH With DAC Non-Linearity Tolerance
| Autor: | Dongyang Jiang, Maurits Ortmanns, Ankesh Jain, Liang Qi, Rui P. Martins, Sai-Weng Sin |
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| Rok vydání: | 2020 |
| Předmět: |
Noise power
Spurious-free dynamic range Dynamic range Quantization (signal processing) 020208 electrical & electronic engineering Non linearity 02 engineering and technology CMOS Linearization 0202 electrical engineering electronic engineering information engineering Electronic engineering Electrical and Electronic Engineering Wideband Mathematics |
| Zdroj: | IEEE Journal of Solid-State Circuits. 55:344-355 |
| ISSN: | 1558-173X 0018-9200 |
| DOI: | 10.1109/jssc.2019.2942359 |
| Popis: | This article presents a dual-loop noise-coupling (NC)-assisted continuous-time (CT) sturdy multistage noise-shaping (SMASH) $\Delta \Sigma $ modulator (DSM), employing 1.5-bit/4-bit quantizers. The proposed SMASH can equivalently work as an overall fourth-order DSM with 4-bit internal quantization. The NC applied in this CT SMASH DSM whitens the 1.5-bit quantization noise (QN) and further reduces its in-band tone power, while a finite-impulse response (FIR) filter integrated into the outermost feedback path suppresses the out-of-band (OOB) noise power of the multibit digital-to-analog converter (DAC) input. Together, they avoid any linearization technique for the multibit DAC. Sampled at 1.2 GHz, the 28-nm CMOS experimental prototype measures a signal-to-noise-and-distortion ratio (SNDR) of 76.6 dB and a spurious-free dynamic range (SFDR) of 87.9 dB over a 50-MHz bandwidth (BW), consuming 29.2 mW from 1.2-V/1.5-V supplies and occupying an active area of 0.085 mm2. It exhibits a Schreier figure-of-merit (FoM) (SNDR) of 168.9 dB. |
| Databáze: | OpenAIRE |
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