Autor: |
Yutaka Fukui, Shigeki Obote, Kouichi Syoubu, Kazutoshi Tsuda, Yasuaki Sumi |
Rok vydání: |
2002 |
Předmět: |
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Zdroj: |
Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems. |
DOI: |
10.1109/apcas.1996.569215 |
Popis: |
Conventionally, the division ratio of the programmable divider in the Phase Locked Loop (PLL) frequency synthesizer is an only integer. Therefore, it has been hoped to realize the fractional-N programmable divider which can divide not only an integer step but also a fractional step. In this paper, a new fractional-N programmable divider for the PLL frequency synthesizer is proposed. In this divider, the width of phase error pulse which phase detector produces in every period of reference frequency is decreased by introducing the new division ratio (N+1/2) besides N and (N+1). |
Databáze: |
OpenAIRE |
Externí odkaz: |
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