SHINE: A Novel SHA-3 Implementation Using ReRAM-based In-Memory Computing
| Autor: | Mohammad Nasim Imtiaz Khan, Karthikeyan Nagarajan, Swaroop Ghosh, Anupam Chattopadhyay, Sina Sayyah Ensan |
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| Rok vydání: | 2019 |
| Předmět: |
Hardware security module
business.industry Computer science 020208 electrical & electronic engineering 02 engineering and technology 020202 computer hardware & architecture Resistive random-access memory CMOS In-Memory Processing Embedded system SHA-3 0202 electrical engineering electronic engineering information engineering State (computer science) business Throughput (business) Energy (signal processing) |
| Zdroj: | ISLPED |
| DOI: | 10.1109/islped.2019.8824979 |
| Popis: | In memory-computing (IMC) architectures provide a much needed solution to energy-efficiency barriers posed by Von-Neumann computing due to movement of data between the processor and the memory. Emerging non-volatile memories (NVM) such as Resistive RAM (ReRAM) implemented in a crossbar array are promising substrates to realize IMC due to excellent High Resistance State (HRS) to Low Resistance State (LRS) ratios and high-densities. Hardware security primitives such as SHA-3 require heavy data traffic between processing elements and memory. Therefore, they can be benefited substantially by in-memory acceleration. We propose SHINE, a high performance and area efficient hardware implementation of the Keccak function that forms the core of SHA-3 by exploiting ReRAM-based IMC. SHINE implements various functions in a Sum of Product (SOP) form in the crossbar array architecture. Simulation results show that it cuts down energy by ∼90.5% and increases throughput by 1.5X to 2.8X as compared to conventional CMOS based implementations such as [1] and [2]. |
| Databáze: | OpenAIRE |
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