Panel-Level Fan-Out RDL-First Packaging for Heterogeneous Integration
Autor: | Patrick Po-Chun Huang, John H. Lau, Chia-Yu Peng, Puru Bruce Lin, Jean-Jou Chen, Leo Chang, Hsing-Ning Liu, Eagle Lin, Cheng-Ta Ko, Tzyy-Jang Tseng, Tim Xia, Kai-Ming Yang |
---|---|
Rok vydání: | 2020 |
Předmět: |
010302 applied physics
Fabrication Materials science 020208 electrical & electronic engineering Fan-out Mechanical engineering 02 engineering and technology STRIPS Temperature cycling Chip 01 natural sciences Industrial and Manufacturing Engineering Electronic Optical and Magnetic Materials law.invention Substrate (building) Printed circuit board Reliability (semiconductor) law 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Electrical and Electronic Engineering |
Zdroj: | IEEE Transactions on Components, Packaging and Manufacturing Technology. 10:1125-1137 |
ISSN: | 2156-3985 2156-3950 |
Popis: | In this article, the fan-out chip-last panel-level packaging for heterogeneous integration is investigated. Emphasis is placed on the design, materials, process, fabrication, and simulation of thermomechanical reliability of a heterogeneous integration of one large chip (10 mm $\times 10$ mm) and two small chips (7 mm $\times 5$ mm) by a fan-out method with a redistribution-layer (RDL)-first substrate fabricated on a 515 mm $\times510$ mm panel. Reliability assessment by thermomechanical simulation includes thermal cycling of the heterogeneous integration of the three-chip package on a printed circuit board (PCB) assembly that is performed by a nonlinear temperature- and time-dependent finite-element simulation. |
Databáze: | OpenAIRE |
Externí odkaz: |