Electroplating Cu Filling Study for Thorough Electrode in Silicon Wafer of Three Dimensional LSI Chip Stacking

Autor: Hitoshi Yonemura, Manabu Tomisaka, Kenji Takahashi, Masataka Hoshino
Rok vydání: 2001
Předmět:
Zdroj: Extended Abstracts of the 2001 International Conference on Solid State Devices and Materials.
DOI: 10.7567/ssdm.2001.b-1-3
Databáze: OpenAIRE