| Popis: |
This paper presents a novel architecture for a RF front end for IEEE 802.11a/b/g wireless LAN. This architecture uses an on-chip frequency doubler for the 5 GHz band while bypassing it with a local oscillator (LO) buffer for the 2.4 GHz band. This allows the use of only one external frequency synthesizer to provide the LO for both the 5 GHz and 2.4 GHz bands. The MMIC, designed in 0.8-/spl mu/m SiGe bipolar technology with f/sub T/ of 50 GHz, consists of transmit and receive chains for both the 2.4 GHz and 5 GHz frequency bands. The transceiver consists of two switched gain LNAs, receive and transmit mixers, two transmit drivers, an LO doubler/buffer and power management and logic circuitry for selecting between transmit/receive, 2.4/5 GHz bands and high/low gain modes of operation. For a 3 V power supply, the overall power consumption for the transmit chain is 138 mW (both bands) and for the receive chain is between 78 mW and 102 mW for the two bands and two modes of operation. |
