Synthesis of Reversible Array Divider Circuit

Autor:	Apurba Sarkar, Aruna Chakraborty, Sraboni Mondal, Somnath Rakshit, Dipak K. Kole
Rok vydání:	2018
Předmět:	Logic synthesis business.industry Computer science Division algorithm Reversible circuits business Execution time AND gate Computer hardware Hardware_LOGICDESIGN Quantum computer
Zdroj:	Information and Communication Technology for Competitive Strategies ISBN: 9789811305856
DOI:	10.1007/978-981-13-0586-3_68
Popis:	Progress made in quantum computation has resulted in logic synthesis with reversible circuits receiving considerable interest. This paper presents a synthesis of reversible array divider circuit based on non-restoring division algorithm implemented with k-CNOT gates. The execution time of such an array divider is low. Our aim is to propose a reversible array divider circuit which is efficient as regards to the number of garbage outputs and gates.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::1b830fb3d79f772462917b83b65bdadc https://doi.org/10.1007/978-981-13-0586-3_68 Zobrazit plný text záznamu