| Popis: |
This paper presents a fully integrated RF receiver frontend for the 6-7-GHz range, intended for future satellite applications, implemented in a standard 0.18 /spl mu/m CMOS technology. It consists of a differential low noise amplifier, an active mixer, two passive mixers, and a quadrature voltage-controlled oscillator. The complete receiver is packaged in a standard 80-pin ceramic flat pack (CFP) and consumes 85 mW from a 1.8-V supply. Measurement results show that the receiver has an overall gain of 8 dB, a -5.5 dBm input-referred third-order intercept point (IIP3), and an image-rejection ratio (IRR) of 45 dB, without using any image rejection filters. |
