Wafer Bumping Process and Inter-Chip Connections for Ultra-High Data Transfer Rates in Multi-Chip Modules With Superconductor Integrated Circuits
| Autor: | D. Tolpygo, Vasili K. Semenov, Sergey K. Tolpygo, R.T. Hunt, Supradeep Narayana, Yuri A. Polyakov |
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| Rok vydání: | 2009 |
| Předmět: |
Interconnection
business.industry Hardware_PERFORMANCEANDRELIABILITY Integrated circuit Condensed Matter Physics Chip Microstrip Electronic Optical and Magnetic Materials law.invention law Logic gate Hardware_INTEGRATEDCIRCUITS Optoelectronics Bumping Wafer Electrical and Electronic Engineering business Electronic circuit |
| Zdroj: | IEEE Transactions on Applied Superconductivity. 19:598-602 |
| ISSN: | 2378-7074 1051-8223 |
| DOI: | 10.1109/tasc.2009.2017858 |
| Popis: | Josephson junction logic cells and superconductor microstrip lines are able to process and transfer digital data with rates up to several hundred GHz as has been demonstrated in single-chip experiments. However, the existing chip-level bumping technique in InSn solder and resulting inter-chip connections do not allow expanding these rates to multi-chip circuits. We developed a wafer-level bumping technology using lithographically-defined bumps deposited either by e-beam evaporation or electroplating, and proposed and implemented a novel design of high-frequency chip interconnects. Chip-to-chip single-flux-quantum pulse transmission rates reaching 110 GHz have been achieved. The observed rates were limited not by the interconnects but by the speed of on-chip test circuitry fabricated in the framework of 4.5 kA/cm2 HYPRES process for superconductor integrated circuits. Experimental results on adhesive-bonded and reflow-bonded multi-chip modules (MCMs) with Au and InSn bumps are presented, and effective parameters of the new interconnect design and MCM technology are discussed. |
| Databáze: | OpenAIRE |
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