Autor: |
Ying-Chieh Chen, Tsau-Hua Hsieh, Yiming Li, Tony Chiang, Kuo-Fu Lee, Kuen-Yu Huang, Ying-Ju Chiu, Hui-Wen Cheng |
Rok vydání: |
2010 |
Předmět: |
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Zdroj: |
2010 IEEE International Conference on Semiconductor Electronics (ICSE2010). |
DOI: |
10.1109/smelec.2010.5549386 |
Popis: |
In this work, we for the first time optimize dynamic characteristic of amorphous silicon thin-film transistor (TFT) gate (ASG) driver circuits for TFT-LCD panel. The rise time, fall time, power dissipation, and ripple voltage of the ASG driver circuit are optimized using simulation-based evolutionary method which integrates genetic algorithm and circuit simulation on the unified optimization framework [1]. Two different a-Si:H TFT ASG driver circuits are optimized, the first circuit consisting of 14 a-Si:H TFT devices is designed for the specification of the rise time < 1.5 µs, the fall time < 1.5 µs and the ripple voltage < 3 V with the minimization of total layout area. The second one with 8 a-Si:H TFTs is further optimized with the power dissipation < 2 mW. The results of this study successfully met the desired specification; consequently, it benefits manufacturing of TFT-LCD panel. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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