FOWLP Design for Digital and RF Circuits

Autor: Teck Guan Lim, Eva Wai Leong Ching, Zi-Hao Chen, Surya Bhattacharya, David Soon Wee Ho
Rok vydání: 2019
Předmět:
Zdroj: 2019 IEEE 69th Electronic Components and Technology Conference (ECTC).
DOI: 10.1109/ectc.2019.00143
Popis: Fan-out Wafer Level Packaging (FOWLP) is a versatile semiconductor packaging technology which can be used for various RF and Digital applications. In the FOWLP technology, the bare die IC is embedded in a molding compound for protection, and a Redistribution Layer (RDL) is formed to route the electrical input/output (I/O) of the IC to the solder ball pads which are distributed on the surface area of the package. Besides fanning out of the electrical I/O, it can also be used for multi-chip 2.5D integration. In addition, vertical interconnect can be formed in the molding compound. Together with additional RDL on the top of the package, the FOWLP allows the electrical circuit connection on both sides of the package to form a much compact Package-on-Package or 3D integrated circuit. Furthermore, the RDL can be used to form high performance RF passive circuit to realize an RF System in Package module.
Databáze: OpenAIRE