Magnetic RAM based filter design for low power signal processing in IOT applications
| Autor: | M S Sunita, Sharath Rao, Ranjith Srinivas, K S Shashikanth |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
010302 applied physics
Magnetoresistive random-access memory Signal processing Hardware_MEMORYSTRUCTURES Finite impulse response Computer science Port multiplier 020208 electrical & electronic engineering Port (circuit theory) 02 engineering and technology 01 natural sciences Power (physics) Filter design Hardware_GENERAL 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Electronic engineering Static random-access memory Hardware_ARITHMETICANDLOGICSTRUCTURES |
| Zdroj: | 2017 14th IEEE India Council International Conference (INDICON). |
| DOI: | 10.1109/indicon.2017.8487647 |
| Popis: | Emerging memory technologies have attracted a lot of interest and has witnessed tremendous innovation in the past couple of years due to the continuous demand for greater performance by modern computing systems. This paper presents the design of Magnetic RAM (MRAM) and its implementation in memory based FIR filter. MRAM has obtained significant interest in the past decade due to its non-volatility property. MRAM stores data using spintronic device Magnetic Tunneling Junction (MTJ). In this paper a mathematical model is developed for MTJ using the LLG equation. A new configuration 3T2MTJ for MRAM is proposed and a dual port MRAM is designed using this configuration. A 9-tap FIR filter is constructed using the proposed dual port MRAM design. The performance of MRAM single cell, single and dual port multipliers and FIR filter is evaluated and compared with the conventional SRAM based system. It can be observed that dual port multiplier using MRAM reduces the power consumption by 77% as compared to SRAM based design and the power consumption in FIR filter is reduced by 37% by using MRAM in the place of SRAM. |
| Databáze: | OpenAIRE |
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